EDN

SRAM designs hit new power and density watermarks

SAN FRANCISCO — Hewlett-Packard has disclosed a portion of its work using silicon-on-insulator (SOI) process technology for the next generation PA-RISC processor that helped it pack a whopping ...
Guru3D

NVIDIA Feynman GPUs Rumored to Add Stacked SRAM for AI Workloads

Leaks suggest that NVIDIA’s future Feynman GPU architecture, expected around 2028, could introduce stacked SRAM memory blocks as part of a broader push toward more specialized and efficient processing ...
EDN

Changes force radical rethink of ASIC SRAM

San Mateo, Calif. — SRAMs embedded in cell-based chip designs are, after years of relative stasis, in the midst of a shakeup. A convergence of factors, both architectural and process-related, is ...
Semiconductor Engineering

Potential of AOS Memories As A High-Performance SRAM Substitute (Georgia Tech, U. of Virginia)

A new technical paper titled “Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache” was published by researchers at Georgia Institute of Technology and ...